I am including OpenCL into an application, and i have installed the Beta driver. I have not problems with OpenCL, but with GtkGLExt and the beta driver. Doing some test with valgrindid i have founded a lot of invalid write / read of size 8 into fglrx drivers

At first i has thinked it was a bug into the application or GtkGlExt, but this problems seem to be related to this beta driver and the fglrx of the last catalyst. On the open source Radeon driver this does not happen.

This invalid read write do not crash the application, but debugging the application in single step mode ( and only on single step mode, indipendent from breakpoints and where you go in single step mode ) , randomly after some step the Linux GUI freeze and an hard reset is needed. Is not important if you use or not OpenCL


Fortunately the application can work with cairo, so i can bypass the problem.


I has done a deeper investigation into the GtkGlExt code and i has created a small sample code that reproduce this problem ( bug ? ) that seem to be related to GLX

#include <X11/Xlib.h>
#include <X11/Xutil.h>
#include <GL/gl.h>
#include <GL/glx.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <gtk/gtk.h>
#include <gdk/gdkx.h>

int main()
{
    Display *xdisplay;
    int screen_num;
    XVisualInfo *xvinfo;
    int is_rgba;

    gtk_init(NULL,NULL);

    xdisplay = gdk_x11_get_default_xdisplay ();
    screen_num = gdk_x11_get_default_screen ();

    int list[32];

    list[0] = GLX_BUFFER_SIZE;
    list[1] = 1;
    list[2] = GLX_DOUBLEBUFFER;
    list[3] = GLX_DEPTH_SIZE;
    list[4] = 1;
    list[5] = None;

    xvinfo = glXChooseVisual (xdisplay, screen_num, (int *) list);

    return 0;
}

line to compile

g++ -DBIG_JOINS=1 -fPIC -fno-strict-aliasing -D_REENTRANT -I/usr/include/gtk-2.0 -I/usr/lib/gtk-2.0/include -I/usr/include/atk-1.0 -I/usr/include/cairo -I/usr/include/pango-1.0 -I/usr/include/pixman-1 -I/usr/include/freetype2 -I/usr/include/directfb -I/usr/include/libpng12 -I/usr/include/glib-2.0 -I/usr/lib/glib-2.0/include   -pthread -I/usr/include/glib-2.0 -I/usr/lib/glib-2.0/include -I/usr/include/gtk-2.0 -I/usr/lib/gtk-2.0/include -I/usr/include/pango-1.0 -I/usr/include/cairo -I/usr/include/pixman-1 -I/usr/include/freetype2 -I/usr/include/directfb -I/usr/include/libpng12 -I/usr/include/glib-2.0 -I/usr/lib/glib-2.0/include -I/usr/include/atk-1.0 -lgtk-x11-2.0 -lgdk-x11-2.0 -latk-1.0 -lpangoft2-1.0 -lgdk_pixbuf-2.0 -lm -lpangocairo-1.0 -lgio-2.0 -lcairo -lpango-1.0 -lfreetype -lfontconfig -lgobject-2.0 -lgmodule-2.0 -lglib-2.0 -lrt -lglib-2.0    -Wl,--export-dynamic -lGLU -lGL -lXmu -lXt -lSM -lICE -lgtk-x11-2.0 -lpangox-1.0 -lX11 -lgdk-x11-2.0 -latk-1.0 -lpangoft2-1.0 -lgdk_pixbuf-2.0 -lm -lpangocairo-1.0 -lgio-2.0 -lcairo -lpango-1.0 -lfreetype -lfontconfig -lgobject-2.0 -lgmodule-2.0 -lglib-2.0 -o bug bug.cpp

Valgrind output

==2177== Memcheck, a memory error detector.
==2177== Copyright (C) 2002-2008, and GNU GPL'd, by Julian Seward et al.
==2177== Using LibVEX rev 1884, a library for dynamic binary translation.
==2177== Copyright (C) 2004-2008, and GNU GPL'd, by OpenWorks LLP.
==2177== Using valgrind-3.4.1-Debian, a dynamic binary instrumentation framework.
==2177== Copyright (C) 2000-2008, and GNU GPL'd, by Julian Seward et al.
==2177== For more details, rerun with: -v
==2177==
==2177== Invalid read of size 8
==2177==    at 0x48AC1A8: (within /usr/lib/libGL.so.1.2)
==2177==  Address 0x512f7c8 is 208 bytes inside a block of size 212 alloc'd
==2177==    at 0x4026FDE: malloc (vg_replace_malloc.c:207)
==2177==    by 0x48671EB: _gl_context_modes_create (in /usr/lib/libGL.so.1.2)
==2177==    by 0x512F48F: ???
==2177==
==2177== Syscall param ioctl(generic) points to uninitialised byte(s)
==2177==    at 0x40007F2: (within /lib/ld-2.9.so)
==2177==    by 0x4C6CD58: ioctl (in /lib/tls/i686/cmov/libc-2.9.so)
==2177==    by 0x68FCEB2: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xbee08d20 is on thread 1's stack
==2177==
==2177== Invalid read of size 8
==2177==    at 0x69777A8: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0x52110d8 is 0 bytes after a block of size 640 alloc'd
==2177==    at 0x4026FDE: malloc (vg_replace_malloc.c:207)
==2177==    by 0x488FC97: AtiCallFGLCWDDE (in /usr/lib/libGL.so.1.2)
==2177==
==2177== Conditional jump or move depends on uninitialised value(s)
==2177==    at 0x6951461: (within /usr/lib/dri/fglrx_dri.so)
==2177==    by 0x6950BE5: (within /usr/lib/dri/fglrx_dri.so)
==2177==    by 0x69483DB: (within /usr/lib/dri/fglrx_dri.so)
==2177==
==2177== Invalid read of size 4
==2177==    at 0x6975FED: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb77fe000 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 8
==2177==    at 0x6975F83: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb77ee000 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 8
==2177==    at 0x6975F87: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb77ee010 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 8
==2177==    at 0x6975F8C: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb77ee020 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 8
==2177==    at 0x6975F91: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb77ee030 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 8
==2177==    at 0x6975FAA: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb77ee040 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 8
==2177==    at 0x6975FAF: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb77ee050 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 8
==2177==    at 0x6975FB4: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb77ee060 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 8
==2177==    at 0x6975FB9: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb77ee070 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 4
==2177==    at 0x676206C: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb782d300 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 8
==2177==    at 0x6977C1F: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb7841000 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 8
==2177==    at 0x6977C23: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb7841010 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 8
==2177==    at 0x6977C32: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb7841020 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 8
==2177==    at 0x6977C37: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb7841030 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 8
==2177==    at 0x6977C46: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb7841040 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 8
==2177==    at 0x6977C4B: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb7841050 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 8
==2177==    at 0x6977C60: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb7841060 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 8
==2177==    at 0x6977C65: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb7841070 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 8
==2177==    at 0x6977E65: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb7842880 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 8
==2177==    at 0x6977E6F: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb7842890 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 8
==2177==    at 0x6977E79: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb78428a0 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 8
==2177==    at 0x6977E83: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb78428b0 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 8
==2177==    at 0x6977E8D: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb78428c0 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 8
==2177==    at 0x6977E97: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb78428d0 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 8
==2177==    at 0x6977EA1: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb78428e0 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 4
==2177==    at 0x697743D: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb77ed000 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 4
==2177==    at 0x6977443: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb77ed004 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 4
==2177==    at 0x6977449: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb77ed008 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 4
==2177==    at 0x697744F: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb77ed00c is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 4
==2177==    at 0x6977455: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb77ed010 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 4
==2177==    at 0x697745B: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb77ed014 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 4
==2177==    at 0x6977461: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb77ed018 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 4
==2177==    at 0x6977467: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb77ed01c is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 4
==2177==    at 0x697746D: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb77ed020 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 4
==2177==    at 0x6977473: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb77ed024 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 4
==2177==    at 0x6977479: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb77ed028 is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== Invalid write of size 4
==2177==    at 0x697747F: (within /usr/lib/dri/fglrx_dri.so)
==2177==  Address 0xb77ed02c is not stack'd, malloc'd or (recently) free'd
==2177==
==2177== ERROR SUMMARY: 1311618 errors from 41 contexts (suppressed: 209 from 6)
==2177== malloc/free: in use at exit: 1,757,029 bytes in 12,001 blocks.
==2177== malloc/free: 38,662 allocs, 26,661 frees, 3,521,521 bytes allocated.
==2177== For counts of detected errors, rerun with: -v
==2177== Use --track-origins=yes to see where uninitialised values come from
==2177== searching for pointers to 12,001 not-freed blocks.
==2177== checked 3,270,736 bytes.
==2177==
==2177== LEAK SUMMARY:
==2177==    definitely lost: 1,446 bytes in 20 blocks.
==2177==      possibly lost: 162,996 bytes in 123 blocks.
==2177==    still reachable: 1,592,587 bytes in 11,858 blocks.
==2177==         suppressed: 0 bytes in 0 blocks.
==2177== Rerun with --leak-check=full to see details of leaked memory.

This sample code do not freeze the Linux GUI in single step debug mode, but a more complex use of GLX like gtkglext, freeze the GUI in single step debug mode.

i want remark that the problem is related to the last linux Catalyst and the last beta driver for OpenCL. Open source radeon driver do not have this problem

We have a multithreaded .net system that we run at our company.  Our production system are

2x Intel(R) Xeon(R) CPU X5355 @ 2.66GHz (4C; 2.66GHz; 2x 4MB L2; 1.33GHz FSB)16GB

And we're Testing

4x Quad-Core AMD Opteron(tm) Processor 8378 (4C; 2.4GHz; 2GHz IMC; 4x 512kB L2; 6MB L3)128GB

We're noticing that our software only runs about 30% faster on the opteron system even though it carries 8 more cores then the current system.  While I realize there's a lot at play here, we were expecting better performance.

Running Sandra on both systems shows that the inter-core test of the opteron system is actually slower then it's intel counterpart both in bandwidth and latency.  The .Net benchmarks are on the order of 20-40% faster (keep getting different results) on AMD.  Everything else seems materially better on Opteron (CPU/Cache/Memory tests).

We are running Windows 2003 64bit for Intel Based System
We are running Windows 2003 Enterprise 64bit for AMD Based SYstem

SciMark C# implementation shows:

Intel
Composite Score: 198.24 MFlops
FFT            : 114.84 - (1024)
SOR            : 354.37 - (100x100)
Monte Carlo    :  23.99
Sparse MatMult : 208.67 - (N=1000, nz=5000)
LU             : 289.33 - (100x100)

Opteron
Composite Score: 174.33 MFlops
FFT            : 110.32 - (1024)
SOR            : 309.89 - (100x100)
Monte Carlo    :  31.13
Sparse MatMult : 191.54 - (N=1000, nz=5000)
LU             : 228.77 - (100x100)

A few questions:

1) Is anyone experiencing the same with their .Net application?

2) Not ruling out the need to profile our software but want to rule out  hardware issues and/or hardware + os issue.  Are there windows server and/or .net versions built to run optimally on amd?

3) Are there better benchmark software besides sandra, cpuz, scimark to use to compare the systems to help identify potential hardware issues?

TIA

I am currently trying to install a new ATI radeon 4350 PCI graphics card into an industrial PC with an existing onboard ATI Rage XL graphics card. The purpose of the new graphics card is to peform stream computing i.e. I want the old graphics card to continue to do the graphics processing and the new card to do my parallel processing.

The problem I have is that when I install the new graphics card it looks like the bios disables the onboard card straight away and uses the new card. I can still see the old card in Device Manager but when I enable it, it tells me that the device cannot be started. I have tried disabling the new card in Device Manager but everytime the bios must kick in and re-enable it.

Is there anyway to fix this problem?

Cheers

operating system to window7 .

i m very courious about your latest demo so can't wait to try .

but when i try ing to run the pingpong on win7,it says can only be ran on vista sp1.what a pity .everyone konws vista isn't that polular.so this way ,

your 10.1 tech no showing to audinces around the world .

so please fix it.     

                                                                         as  an       AMD ATI fan

Where to get this great SDK that AMD Overdrive overclocking application uses?

where can I find an information on the opteron CPU technology such as what is a switching delay in typical inverter inside the processor (in particular - in its ALU)?

Thank you in advance.

does anyone have public information on how many CPU/clock cycles it takes for latest AMD CPUs to perform 32-bit multiplication? There should be a document listing all the durations for every command, but I can't find it...

Thanks!

I am a student from York University, and I'm doing a marketing plan based on your company. I was wondering if someone is able to aid me in understanding your various levels of distribution channels and their logistics.

I am aware the website has information on types of distributors and their regions however, I need more depth in the information. (ie. what exactly is a master distributor? How is your product transfered in terms of transportation? How many distribution channels are there, in terms of distributors --> wholesalers --> other resellers --> retail stores??)

Is there anyone I can contact or if you can assist me in understanding this?

Thank You!

As you know, AMD-V has some versions like NPT only or NPT with Page Walk Cache. Is there somebody who knows which one has NPT with Page Walk Cache? 

Thanks

http://www.guru3d.com/news/radeon-hd-5870-quadfire-user-video

In particular, (1) how many streams can be active, (2) automatic hardware prefetch and how to control it, (3) what happens if address not in TLB and/or page table.

The embedded memory controller is supposed to have a data sheet, but I can't find one.  A pointer to that would also be appreciated.

Thank you.

But now that the Intel i5 (i7-performance for not much money), should I go for the i5, with cheap dualchannel mem mobo's,and the i5 itself cost a lot less than the Phenom II 940/965 and CRUSHES the AMD in tests.

Is AMD going to slash their prices (considerably) for the Phenom II range in the near future, or are they giving away the homemarket to Intel? (Again) :-| I've always used AMD systems,and I'd like to continue to do so in the fiture, but the i5's performance have made me think twice at the current Phenom II prices. If AMD is gonna stand a chance, they'll have to cut CPU-prices FAST, not after people have ordered their xmas-parts/systems!

So, does anyone here know if AMD is lowering Phenom II prices soon, or should I just go for the Intel i5?

no AMD-V CPU

Detail page for AMD Phenom™ X4 9950

Phenom X4 9550

For AMD Athlon™ II X2 250

Athlon II X2 250

This can't be right!

I am not using prefetch and movnt(q).

Why is my best result well bellow 2GB/s? (about 700 MB/s)
Why is my worst result as low as 18Mb/s?
What should I know about hardware architecture
to understand this?Links,Docs?

(note: For sequential movntq i get 1748.86 MB/s.)
(possible explanations: cache is getting in the way,memory address lines are multiplexed ....??)

------------------------------------------------------------------------
Cpu: AMD Thorton 2 GHz  (socket A)
Cache: L1 64KB D/I L2 256 KB full speed
Memory: DDR1 133/266 MHz FSB capacity 1.2 GB speed (should be) 2100 MB/s
Chipset: VIA KT400

------------------------------------------------------------------------
Test algorithm:
Addres equals base address.
Address is inkremented by (constant) jump value
and when it reaches the end of the memory chunk
it resets to incremented base address (by 1).
The process then repeats
until base address increment is equal to jump
or is equal to memory size chunk.
(
every n_th address is read then every (n_th)+1
then every (n_th)+2 and so on... until every (n_th)+(jump-1)
thus reading the whole memory chunk
)
Memory chunk size is 4MB.
Memory is tested for speed with diffrent jump values.
note: Memory test code with memory transfers commented out
      is about the same speed for diffrent jump values.

-------------------------------------------------------------------------
Test code:

#include<windows.h>
#include<stdlib.h>
#include<stdio.h>

void test1(long* m,long jump){

_asm{
mov edi,[m]
mov esi,edi
add esi,4194304
mov ecx,edi
mov ebx,0
mov edx,jump
shl edx,2
}

ll:
_asm{
mov edi,ecx   //mov edi,[m]
add edi,ebx
}

l:
_asm{
mov eax,[edi]
add edi,edx
cmp edi,esi
jb l

add ebx,4
cmp ebx,edx
jae k
cmp ebx,4194304
jae k
jmp ll
}

k: ;

}

void test2(long* m,long jump){
long a;
long adr=0;
long pass=0;

while(pass<jump && pass< 1048576){
adr=pass;
   while(adr<1048576){    //  4194304/4
   a=m[adr];
   adr+=jump;
   }
pass++ ;
}

}

void main(){

double cur,best=0,worst=3000;
int j;
long i;
int tick;
FILE *f;
long *m=(long *)malloc(4194304);
f=fopen("test2.txt","w");

for(i=1;i<=524288;i<<=1){

  tick=GetTickCount();
  for(j=0;j<1000;j++) test2(m,i);   //--------------------------
  tick=GetTickCount()-tick;

  cur=(double)( 4194304/((double)tick/1000000)/(1024*1024) );
  if(cur>best)best=cur;
  if(cur<worst)worst=cur;
  printf("\n speed=%5.2f MB/s   jump= %d *4 bytes",cur,i);
  fprintf(f,"\n speed=%5.2f MB/s   jump= %d *4 bytes",cur,i);
}

  
   printf("\n\n best=%5.2f MB/s  worst=%5.2f MB/s \n",best,worst);
fprintf(f,"\n\n best=%5.2f MB/s  worst=%5.2f MB/s \n",best,worst);
fclose(f);                  
}

--------------------------------------------------------------------------
Test results:

test1 assembler:

 speed=644.85 MB/s   jump= 1 *4 bytes
 speed=453.10 MB/s   jump= 2 *4 bytes
 speed=307.69 MB/s   jump= 4 *4 bytes
 speed=190.90 MB/s   jump= 8 *4 bytes
 speed=101.79 MB/s   jump= 16 *4 bytes
 speed=109.40 MB/s   jump= 32 *4 bytes
 speed=105.35 MB/s   jump= 64 *4 bytes
 speed=96.93 MB/s   jump= 128 *4 bytes
 speed=90.36 MB/s   jump= 256 *4 bytes
 speed=80.65 MB/s   jump= 512 *4 bytes
 speed=71.93 MB/s   jump= 1024 *4 bytes
 speed=67.32 MB/s   jump= 2048 *4 bytes
 speed=37.19 MB/s   jump= 4096 *4 bytes
 speed=18.85 MB/s   jump= 8192 *4 bytes
 speed=18.79 MB/s   jump= 16384 *4 bytes
 speed=18.80 MB/s   jump= 32768 *4 bytes
 speed=201.89 MB/s   jump= 65536 *4 bytes
 speed=475.85 MB/s   jump= 131072 *4 bytes
 speed=715.05 MB/s   jump= 262144 *4 bytes
 speed=677.28 MB/s   jump= 524288 *4 bytes

 best=715.05 MB/s  worst=18.79 MB/s

test2 c++ :

 speed=436.87 MB/s   jump= 1 *4 bytes
 speed=261.76 MB/s   jump= 2 *4 bytes
 speed=139.81 MB/s   jump= 4 *4 bytes
 speed=101.11 MB/s   jump= 8 *4 bytes
 speed=71.99 MB/s   jump= 16 *4 bytes
 speed=98.35 MB/s   jump= 32 *4 bytes
 speed=95.42 MB/s   jump= 64 *4 bytes
 speed=89.89 MB/s   jump= 128 *4 bytes
 speed=71.87 MB/s   jump= 256 *4 bytes
 speed=68.05 MB/s   jump= 512 *4 bytes
 speed=64.61 MB/s   jump= 1024 *4 bytes
 speed=67.67 MB/s   jump= 2048 *4 bytes
 speed=37.14 MB/s   jump= 4096 *4 bytes
 speed=18.79 MB/s   jump= 8192 *4 bytes
 speed=18.75 MB/s   jump= 16384 *4 bytes
 speed=18.77 MB/s   jump= 32768 *4 bytes
 speed=195.71 MB/s   jump= 65536 *4 bytes
 speed=198.45 MB/s   jump= 131072 *4 bytes
 speed=316.83 MB/s   jump= 262144 *4 bytes
 speed=460.46 MB/s   jump= 524288 *4 bytes

 best=460.46 MB/s  worst=18.75 MB/s

(What does random access memory stand for again?)

Not to mention the links provided in this forum for ATI GPU support (http://support.ati.com/ics/support/default.asp?deptID=894) are all broken too.

Suppose a clean cache line, L, is only held in the L1D cache for core0 in the CPU, and not in the L3.

If core1 tries to read data from L, it will miss in it's L1D and L2 caches.  It will probe the L3 cache, and should probe the other L1D and L2 caches in the CPU (to see if the line is present and modified).

Who will satisfy core1's request?

1.  It could get the data from the memory controller, which would be slow.

2.  It could get the data from the L1D cache for core0, which should be faster.

It seems like #2 would make the most sense.  Can someone from AMD explain which is the case?  It's possible that this is not a yes/no question and is more complex, and if so, I'd like to understand what will determine the answer (e.g. would the probe filter change behavior at all).

Added: I just checked the BIOS and kernel dev guide and it appears that there is a performance counter "EventSelect 043h Data Cache Refills from the Northbridge" and the unit mask selects which of the 5 states the line is in...this seems to imply that a clean line could be filled from another L1D on the same die, but it'd be nice to have this verified.

Thanks,

David

I'll skip the 3 days of careful and thorough tests I ran, but it included running memtest86+ for hours from boot CD generated (zero errors), removing everything except video card from the motherboard slots, trying other memory modules, underclocking the CPU from 3.4GHz to 2.4GHz, underclocking the 1600MHz memory modules to 800MHz, and so forth.

For some odd reason the BIOS sets the northbridge/hypertransport speeds to 2000MHz instead of the 2600MHz that this CPU and chipset should support, so that should have been very conservative.  Nonetheless after I had tried everything else I downshifted via BIOS the northbridge/hypertransport speeds from 2000MHz to 1600MHz --- and the system became completely reliable, stable, solid thereafter (for 2+ days so far).

Thinking the motherboard and/or northbridge chipset must be defective (slower than specification) I ordered a new motherboard.  I figured this would surely solve the problem.  Today I got the new motherboard and found it has ***exactly*** the same problem.

My question is --- where is the bug?

I am certain AMD chip testing tests the hypertransport bus on their CPUs at the full 5200MT/s hypertransport v3.0 speeds, so I tend to believe the CPU is not defective.

That leaves two possibilities that I can think of:

#1: Something is fundamentally wrong with this motherboard.

#2: Some code in Windows XP 64-bit edition malfunctions when the northbridge/hypertransport speeds exceed 1600MHz.

To me, #1 seems quite unlikely for the following reason.  I chose this motherboard because most reviews of the Phenom II x4 965 BE CPU were performed on this motherboard --- and none of them reported any problems with flakiness in general or the northbridge/hypertransport in particular.  In fact, many of these reviews overclocked the various parts of the system to see what kind of performance they could achieve.

That leaves #2, which seems somewhat unlikely too --- but what other possibilities are there?  Am I missing some more likely possibility?  Obviously there is one other possibility:

#3: The CPU chip I have was not properly tested, or malfunctioned within the first 15 minutes of running in my system.  That seems highly unlikely to me, but it is possible.

Q1: Does anyone else run this combination of <CPU, motherboard, OS> with northbridge/hypertransport at 2000MHz to 2600MHz (or higher)?

Q2: Does anyone see any other possibilities that did not occur to me?

PS: The CPU temperature never exceeds 41C, the system temperature never exceeds 41C, the GPU temperature never exceeds 51C, and the system has lots of fans and excellent airflow (and the fans always run at full speed).  The problem is no more likely to occur with lots of CPU activity versus minimal activity.

#####  system specifications  #####

motherboard: one gigabyte GA-MA790FXT-UD5P
CPU: one 3.4GHz AMD phenom II x4 965 BE (black edition)
DRAM: four mushkin 996601 modules (4 x 2GB DDR3-1600MHz @ 7-7-6-18)
video: one evga nvidia GTX 285 with 2GB VRAM
disks: two seagate 1TB SATAII drives (ST31000528AS)
disks: one western-digital 1TB SATAII drive (WD10EADS-00M2B0)
CDDVD: one NED CD/DVD burner (ND-3540A)
power: one coolmax greenpower 950W (CUG-950B)
CPU-cooler: zalman CNPS9700
fans: eight 80mm ball-bearing fans running constantly at full speed

NOTE:  the DDR3 memory is running at 800MHz to 1333MHz @ 9-9-9-24
NOTE:  often the tests were run with only one hard disk drive connected

PS:  Reply here or send reply to <maxreason at gmail dot com>.

Picture:

http://www.hkepc.com/forum/attachments/month_0908/20090829_1245c7f8701cbfe059e6WnpvoLbv8yqo.jpg

http://www.hkepc.com/forum/attachments/month_0908/20090829_5f7b60816642eceb0cfcRvAzaYjJlCVN.jpg

I want to optimize the memory managing of linux which is CPU+GPU?but I don't know what I do,can someone give some idea?

Edit: Turned off emoticon parsing

My code works as follows:

1) One thread scans down one column of A and B and compares the elements.

2) Using a Attribute, I define a thread goup of 64 threads. In the second step, after those 64 threads have scanned the columns, they communicate using local data store and reduce their results to a single output.

3) I have enhanced this implementation, by using creating more threads and each thread scans only part ways down the column. To do this, I use kernel.domainSize( ... ). I also use float4, so each thread essentially scans 4 columns.

My Problem:

My code works perfectly fine the first iteration. However, if I run it within a loop with several iteration, it fails to produce the correct results. After some debugging - it seems to me that the second time around my threads are not created properly ( printing their thread  ids does not make any sense the second iteration). I think that this has something to do with Attribute or Domain and I cannot figure it out for 2 days now.It also seems that my output stream has to be the same size as my domain - for my code to work. In other words I think that domain does not work.

I have attached my code. Any help will be appreciated.

My code works per

--Jeff

i m kind of new in development line, but i m working hard to be pro.

wish me luck.

i'm using linux and have desktop with HD2400. Currently HD2400 is very hot. No X11 is running, just plain console. I'm searching a way to cool down my HD2400. I have 42589_rv630_rrg_1.01o.pdf, but there is'nt enoung information about power managment.

I tried to setu up GPU_COUNTER_CLK to 1 in GENERAL_PWRMGT register, but this seems doesn't help.

Changing SCLK_PWRMGT_EN in SCLK_PWRMGT_CNTL and MPLL_PWRMGT_OFF in MCLK_PWRMGT_CNTL doesn't help too.

Is there any recomendations/documentation how to setup device for low power mode?

According to the RS780 and RS690 ASIC Family Register Reference Guide, the only supported payload size for PCI express TLPs is 128 bytes. Is this the same for all current AMD northbridges? Or are there some that support different payload sizes?

Thank you.

"BIOS and Kernel Developer's Guide" contains that kind of info, but version for Phenom doesn't seem to be available...

It would be nice if I could get ACC- related info, but I suppose this is deeply in the "wet dreams" area...

Can anyone help ?

Regards,

Regards,

Edit: Removed advertising

Greetings,

A few of our members have asked how to post code snippets without losing indentation and formatting. There are actually two ways that you can preserve your code indentation/formatting when posting to our forum.

1. The first method is the easiest. In your forum profile, select the WYWIWYG editor instead of the HTML editor. From there, you can simply copy/paste your code, and the indentation/formatting will be preserved. For example:

default
{
    state_entry()
    {
        llSetStatus(STATUS_PHYSICS, TRUE);
        llSetBuoyancy(1.1);
        llSetStatus( STATUS_DIE_AT_EDGE, FALSE);
        llSetTimerEvent(gap);
        llResetTime();
    }
    on_rez(integer delay)
    {
        buoyancy();
    }

}

To select the WYSIWYG editor, visit http://forums.amd.com/forum/profile.cfm?FTVAR_PROFILEPAGE=2 and then check the WYSIWYG Editor button.

2. If you prefer using the HTML editor, then you can enclose your code within ...tags. Again, this will preserve your formatting/indentation.

In either case, you should always check the Do not parse emoticons checkbox, which prevents code elements from being converted into smileys.

I would like to be able to capture analog video on the AVIVO connector.

Which SDK allows this?

would like to be advised to whom can I can forward my question. Our company developed a lot of numerical software starting from sparse/dence/compressed linear system solvers, CFD and wave propargation and many others. Last year we port a lot of our software to NVIDIA GPUs (I can provide 4 reference links from NVIDIA corporate site to our site).

We can use our 17 years software development experience to considerably improve ACML that will compete with MKL and beat most of CUDA enabled BLAS/LAPACK and other scientific libraries.

It would be very kind if somebody can forward this message or my contacts to some executives in AMD for discussion.

Sincerely,

Ilgis Ibragimov

--

Dr. Ilgis Ibragimov

Vice-President

Elegant Mathematics Ltd.

+49-163-7414473

is that true?

http://www.cxotoday.com/India/News/AMD_India_Center_Develops_30-70_of_Processors/551-102762-912.html