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Topic Title: Z-RAM + AMD
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Created On: 03/30/2006 02:38 PM
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 03/30/2006 02:38 PM
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zeppelinrox
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interesting... Memory, AMD, and other Stuff

quote:

Originally posted by: Unknown AMD made a big splash about possibly using this technology to increase the size of their L2 caches by up to 5X without taking up more die space.
.......
If AMD can get this design into play soon, we can expect to see L2 caches of up to 4 MB per core using the same die space as the standard 1 MB S-RAM


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 03/30/2006 10:43 PM
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daRk Kon
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quote:

Originally posted by: zeppelinrox
interesting... Memory, AMD, and other Stuff


oh noez.. here comes the intel sized caches...

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 03/30/2006 10:44 PM
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Royal Flush
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More cache + Risc processing = Good

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 03/30/2006 10:45 PM
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daRk Kon
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quote:

Originally posted by: Royal Flush
More cache + Risc processing = Good


also = slower performance.

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 03/30/2006 10:46 PM
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Silk_the_Absent1
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Where did you get that? It simply isn't true.

-Adam
 03/30/2006 10:53 PM
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Royal Flush
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so 512kb of cache is slower than 1mb?
I think conroe's 4mb of cache gave it an edge

No this is not a conroe discussion PLEASE dont compare it to the 64 there are too many of those.

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 03/30/2006 11:02 PM
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daRk Kon
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quote:

Originally posted by: Royal Flush
so 512kb of cache is slower than 1mb?
I think conroe's 4mb of cache gave it an edge

No this is not a conroe discussion PLEASE dont compare it to the 64 there are too many of those.


surely its not worse, what i was referring it to is that it can hurt performance and speed up performance, it all depends on what things.

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 03/30/2006 11:14 PM
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Silk_the_Absent1
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More cache is always a good thing, but it can get to the point of diminishing returns, where it no longer gives enough boost to merit the added cost/voltage/etc. But it will not hurt performance.

-Adam

EDIT: I suppose it could, if it were at say, half speed. Like it was done years ago. It isn't done that way anymore though.

-Adam
 03/30/2006 11:59 PM
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daRk Kon
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quote:

Originally posted by: Silk_the_Absent1
More cache is always a good thing, but it can get to the point of diminishing returns, where it no longer gives enough boost to merit the added cost/voltage/etc. But it will not hurt performance.

-Adam

EDIT: I suppose it could, if it were at say, half speed. Like it was done years ago. It isn't done that way anymore though.

-Adam


oh.. alright thanks for clarifying.

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 03/31/2006 12:13 AM
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Mime
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Even then it wouldn't hurt performance. At that time, a cache running at half of the CPU clock speed was still a lot faster than main memory, and the purpose of using a cache at all is to have a place where the CPU can look for stuff that'll be faster than having to go all the way out to main memory and back again.

I still say that the best fit for x86 is to be called MISC.

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 03/31/2006 12:17 AM
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Silk_the_Absent1
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Yeah, I was just thinking about that in IRC. At worst, it won't have worse latencies then the system memory interface. So even then, it would still add performance.

-Adam
 03/31/2006 01:14 AM
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zeppelinrox
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quote:

Originally posted by: Royal Flush
so 512kb of cache is slower than 1mb?
I think conroe's 4mb of cache gave it an edge


IIRC, conroe's L2 cache is 4 megs but the whole thing is shared by both cores. So if there is only 1 active core, it has access to all 4 megs.
On amd's cpus, the L2 cache is separated so if there is 2 megs, with 1 meg per core, and if there is only 1 active core, it won't have access to 2 megs.
It would be good if amd could somehow have 1 core access all available L2 cache.

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 03/31/2006 01:18 AM
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games173
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cisc is hardware speed orented and structions inbedded on chip

risc is software preformnce orented and the software controls the memory and load store functions

so i rather have cisc for gaming and risc for scientific applications or java apps

misc sounds good a mix of the two has been happening for years now , slowly

z-ram will work like core duo cache does, works ok for intel
 03/31/2006 01:20 AM
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Java
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Z-Ram is capable of offer 5x densities over SRAM. That does not mean that AMD would increase their cache sizes by 5x.

It remains to be seen how AMD might utilize this technology in their cache.

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 03/31/2006 01:26 AM
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zeppelinrox
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oh yeah.. the article does state
quote:

Originally posted by: Unknown L2 caches of up to 4 MB per core using the same die space


ok.. that would be sweet... up to 8 megs L2 cache total.

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 03/31/2006 02:01 AM
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Mime
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quote:

Originally posted by: games173
cisc is hardware speed orented and structions inbedded on chip

risc is software preformnce orented and the software controls the memory and load store functions

so i rather have cisc for gaming and risc for scientific applications or java apps

misc sounds good a mix of the two has been happening for years now , slowly



Yeah... the two schools have been mixed for a while now. RISC and CISC were never chip architectures, per say, but general guidelines on how to best build a chip given the resources at hand. The MISC thing is just a little hacker humor, since misc is an abbreviation for miscellaneous, and it just happens to have "ISC" as the last three letters...

And yeah... the zram deal is about density. There's SRAM cache cells of different densities also, but each SRAM cell is made of 4 to 6 transistors, which sort of puts a cap on how small you can make them.

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 03/31/2006 12:16 PM
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FrozenSteel
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Yes, this may be a nice cache storage type but how much will this cost? Because who knows maybe its 2x or 4x more expensive than what we have today...

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 03/31/2006 01:58 PM
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Mime
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I don't think that's going to happen... Reducing cost is what stuff like this is all about...

If the cache takes up less space, then it should help to create a cheaper CPU overall.

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