On an Athlon 64 platform, there is no 'FSB' in the 'classical' sense anymore.
The 'classical' Frontside Bus is the connection between the CPU and the chipsets' Northbridge which contains the memory-controller and connects to the rest of the system(via the Southbridge).
If you define the FSB as the connection between the CPU and memory-controller, then it does not really exist anymore on an Athlon 64-platform since the memory-controller is integrated into the CPU...in this case you could say the 'FSB' is running at full core-clockspeed.
However, if you define the FSB as the connection between the CPU and the rest of the system(regardless of whether a memory-controller is involved or not), you could say the CPUs' Hypertransport-link replaces the FSB(or it IS the FSB if you like).
The Hypertransport-link is different from a 'classical' FSB - it is not really a Bus, but a fast, packet-based point-to-point interconnect.
The HT-link comprises an upstream-(to CPU) and a downstream-part(from CPU), each 16-bits wide and clocked at 800MHz(Socket 754) using a DDR-technology for an effective 1600MHz
clockspeed - this results in a total bandwidth of 6.4GB/s bidirectionally.
The Opteron 2xx- and 8xx-series have additional HT-links for communication between multiple CPUs.
You can find more info about Hypertransport here
Both the Athlon 64's Hypertransport-link and the current Pentum 4's 800MHz(QDR) FSB have a total bandwidth of 6.4GB/s - 200MHz x4(QDR) x8(Bus width: 64-bits=8 Bytes)) = 6400MB/s for the P4 and 800MHz x2(DDR) x4(HT-link width: 16-bits up- and 16-bits downstream = 32-bit total = 4 Bytes) = 6400MB/s for the A64.
Now where's the difference?(apart from the architectural differences of the connection between the processor and chipset)
On a Pentium 4 platform, the memory-controller is integrated into the chipsets' Northbridge - this means both memory- and I/O-access have to go through the FSB.
Since modern P4-chipsets have dual-channel memory-controllers, this leaves technically no room(bandwidth-wise) for I/O accesses - dual DDR400(PC3200)-channels have a maximum theoretical bandwidth of 6.4GB/s.
Additionally, having the memory-controller integrated into the chipset causes added latencies when accessing memory.
In contrast, an Athlon 64 has an on-die memory-controller - this means the memory-controller is integrated right into the CPU-core and has it's own dedicated path to the memory itself which is completely independent from the HT-link.
This leaves the HT-links entire
bandwidth available for I/O.
Also, the on-die memory-controller significantly reduces latencies when accessing memory, which noticably improves efficiency and performance.Pentium 4 platform:
Northbridge(also connects to AGP - 2.1GB/s)-------[dual DDR-channels(6.4GB/s)]-----Memory(DDR400/PC3200)
Southbridge-----Rest of system('I/O'Athlon 64 platform:
CPU-----[single DDR-channel(Socket 754, 3.2GB/s)]-----Memory(DDR400/PC3200)
Northbridge(also connects to AGP - 2.1GB/s)
Southbridge-----Rest of system('I/O'
More info about the 'FSB' in general here
The opinions expressed above do not represent those of Advanced Micro Devices or any of their affiliates.
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