OP Back to post a bit about my progress.
A lot of time passed since I last fiddled around with OC this MB - Anyway - I'm now quadrobooting into different windows operating systems - and using windows server 2003 R2 x64 for my current OC OS as I'm still using Ntune (version 5.0.8.6 atm. with nvsuoem.ini from 6.05 )
The audence for my post is probably limited as this is now an obsolotete platform, but nevertheless...
The progress so far is a bit limited but in 2003 x64 I can now OC the HTx5 link to 233 MHz with the NB link set to x11 multi.
This OC gives the 8384 Optys a core speed of 3145 Mhz NB speed@2562 MHz and DDR2 cas5@776 MHz
http://postimage.org/image/3nohec675/
http://valid.canardpc.com/show_oc.php?id=2236322 (OC in WinXP x64)
I can run at HTT link speed @240 Mhz but this will crash some games....(more below HWMonitor dump)
Processor 1 ID = 0
Number of cores 4 (max 4)
Number of threads 4 (max 4)
Name AMD Opteron 8384
Codename Shanghai
Specification Quad-Core AMD Opteron(tm) Processor 8384
Package Socket Fr4 (1207)
CPUID F.4.2
Extended CPUID 10.4
Brand ID 2
Core Stepping RB-C2
Technology 45 nm
TDP Limit 117 Watts
Core Speed 3145.4 MHz
Multiplier x FSB 13.5 x 233.0 MHz
HT Link speed 1165.0 MHz
Stock frequency 2700 MHz
Instructions sets MMX (+), 3DNow! (+), SSE, SSE2, SSE3, SSE4A, x86-64, AMD-V
L1 Data cache 4 x 64 KBytes, 2-way set associative, 64-byte line size
L1 Instruction cache 4 x 64 KBytes, 2-way set associative, 64-byte line size
L2 cache 4 x 512 KBytes, 16-way set associative, 64-byte line size
L3 cache 6 MBytes, 48-way set associative, 64-byte line size
FID/VID Control yes
FID range 4.0x - 13.5x
Max VID 1.300 V P-State FID 0xB - VID 0x14 - IDD 23 (13.50x - 1.300 V)
P-State FID 0x4 - VID 0x1C - IDD 20 (10.00x - 1.200 V)
P-State FID 0x10E - VID 0x20 - IDD 18 (7.50x - 1.150 V)
P-State FID 0x100 - VID 0x20 - IDD 16 (4.00x - 1.150 V)
Package Type 0x0
Model 84
String 1 0x0
String 2 0xF
Page 0x0
CmpCap 4
ApicIdCoreSize 4
TDC Limit 92 Amps
Attached device PCI device at bus 0, device 24, function 0
Attached device PCI device at bus 0, device 24, function 1
Attached device PCI device at bus 0, device 24, function 2
Attached device PCI device at bus 0, device 24, function 3
Attached device PCI device at bus 0, device 24, function 4
Processor 2 ID = 1
Number of cores 4 (max 4)
Number of threads 4 (max 4)
Name AMD Opteron 8384
Codename Shanghai
Specification Quad-Core AMD Opteron(tm) Processor 8384
Package Socket Fr4 (1207)
CPUID F.4.2
Extended CPUID 10.4
Brand ID 2
Core Stepping RB-C2
Technology 45 nm
TDP Limit 117 Watts
Core Speed 3145.4 MHz
Multiplier x FSB 13.5 x 233.0 MHz
HT Link speed 1165.0 MHz
Stock frequency 2700 MHz
Instructions sets MMX (+), 3DNow! (+), SSE, SSE2, SSE3, SSE4A, x86-64, AMD-V
L1 Data cache 4 x 64 KBytes, 2-way set associative, 64-byte line size
L1 Instruction cache 4 x 64 KBytes, 2-way set associative, 64-byte line size
L2 cache 4 x 512 KBytes, 16-way set associative, 64-byte line size
L3 cache 6 MBytes, 48-way set associative, 64-byte line size
FID/VID Control yes
FID range 4.0x - 13.5x
Max VID 1.300 V P-State FID 0xB - VID 0x14 - IDD 23 (13.50x - 1.300 V)
P-State FID 0x4 - VID 0x1C - IDD 20 (10.00x - 1.200 V)
P-State FID 0x10E - VID 0x20 - IDD 18 (7.50x - 1.150 V)
P-State FID 0x100 - VID 0x20 - IDD 16 (4.00x - 1.150 V)
Package Type 0x0
Model 84
String 1 0x0
String 2 0xF
Page 0x0
CmpCap 4
ApicIdCoreSize 4
TDC Limit 92 Amps
Attached device PCI device at bus 0, device 25, function 0
Attached device PCI device at bus 0, device 25, function 1
Attached device PCI device at bus 0, device 25, function 2
Attached device PCI device at bus 0, device 25, function 3
Attached device PCI device at bus 0, device 25, function 4
Processor 3 ID = 2
Number of cores 4 (max 4)
Number of threads 4 (max 4)
Name AMD Opteron 8384
Codename Shanghai
Specification Quad-Core AMD Opteron(tm) Processor 8384
Package Socket Fr4 (1207)
CPUID F.4.2
Extended CPUID 10.4
Brand ID 2
Core Stepping RB-C2
Technology 45 nm
TDP Limit 117 Watts
Core Speed 3145.4 MHz
Multiplier x FSB 13.5 x 233.0 MHz
HT Link speed 233.0 MHz
Stock frequency 2700 MHz
Instructions sets MMX (+), 3DNow! (+), SSE, SSE2, SSE3, SSE4A, x86-64, AMD-V
L1 Data cache 4 x 64 KBytes, 2-way set associative, 64-byte line size
L1 Instruction cache 4 x 64 KBytes, 2-way set associative, 64-byte line size
L2 cache 4 x 512 KBytes, 16-way set associative, 64-byte line size
L3 cache 6 MBytes, 48-way set associative, 64-byte line size
FID/VID Control yes
FID range 4.0x - 13.5x
Max VID 1.200 V P-State FID 0xB - VID 0x1C - IDD 23 (13.50x - 1.200 V)
P-State FID 0x4 - VID 0x20 - IDD 20 (10.00x - 1.150 V)
P-State FID 0x10E - VID 0x20 - IDD 18 (7.50x - 1.150 V)
P-State FID 0x100 - VID 0x20 - IDD 16 (4.00x - 1.150 V)
Package Type 0x0
Model 84
String 1 0x0
String 2 0xF
Page 0x0
CmpCap 4
ApicIdCoreSize 4
TDC Limit 92 Amps
Attached device PCI device at bus 0, device 26, function 0
Attached device PCI device at bus 0, device 26, function 1
Attached device PCI device at bus 0, device 26, function 2
Attached device PCI device at bus 0, device 26, function 3
Attached device PCI device at bus 0, device 26, function 4
Processor 4 ID = 3
Number of cores 4 (max 4)
Number of threads 4 (max 4)
Name AMD Opteron 8384
Codename Shanghai
Specification Quad-Core AMD Opteron(tm) Processor 8384
Package Socket Fr4 (1207)
CPUID F.4.2
Extended CPUID 10.4
Brand ID 2
Core Stepping RB-C2
Technology 45 nm
TDP Limit 117 Watts
Core Speed 3145.4 MHz
Multiplier x FSB 13.5 x 233.0 MHz
HT Link speed 233.0 MHz
Stock frequency 2700 MHz
Instructions sets MMX (+), 3DNow! (+), SSE, SSE2, SSE3, SSE4A, x86-64, AMD-V
L1 Data cache 4 x 64 KBytes, 2-way set associative, 64-byte line size
L1 Instruction cache 4 x 64 KBytes, 2-way set associative, 64-byte line size
L2 cache 4 x 512 KBytes, 16-way set associative, 64-byte line size
L3 cache 6 MBytes, 48-way set associative, 64-byte line size
FID/VID Control yes
FID range 4.0x - 13.5x
Max VID 1.250 V P-State FID 0xB - VID 0x18 - IDD 23 (13.50x - 1.250 V)
P-State FID 0x4 - VID 0x20 - IDD 20 (10.00x - 1.150 V)
P-State FID 0x10E - VID 0x20 - IDD 18 (7.50x - 1.150 V)
P-State FID 0x100 - VID 0x20 - IDD 16 (4.00x - 1.150 V)
I did have to change some things in order to attain this new OC limit.
I figured that the CPU's have been binned for different voltages at 2700 Mhz as is apparent above.
This presented me with an issue - Since I had not considered the physical placement of the cpus in the sockets when I first started to set up the system I had the 1.2 volter going into the boot BSP cpu (0) socket and a 1.3 hanging in socket 3.
Switching these two ensured I had a little more headroom. But by looking at the volt's I should also switch cpu 1 with cpu 2 since It would probably give me just a little more juice having the two 1.3 volters in socket 0 and 1.
But it's quite a cable mess and a bit time consuming to do this swapping as you can witness here
<br ">http://postimage.org/image/638vzi53r/
]http://postimage.org/image/638vzi53r/
<br [/L]
Basically what I have been searching for is a way to override the cpu's reported VID's to the Volterra VRMs driving vcore voltage.
Tyan's BIOS does not expose any programmability of the VRM's to the OS (Ntune) so I've been scouring the net for information about the VT1165 VRM and found a lot of discussions about this VRM chip being used to control the vcore for GPU's which gives me some hope.
I've been using HW monitor to probe the devices on the SMBUS interface but have yet to identify the Master VRM chip driving the four slave VRM's. Or if the individual VRM driving each cpu's vcore can be addressed (found) on the SMBUS.
I checked out a google code project derivate of rivatuners vt1165 plugin - and research is ongoing... (found some datasheet's on the volterra chips - but the ones I found don't reveal how to program the VID's in anyway - maybe there is a standard PM protocol that I overlooked, that every VRM chip adheres to??)
The following regulator control capabilities are supported
over the SMBus interface:
. Override the VID code settings to program the output
voltage
Hints for my next steps will be appreciated (Register Data for the VT1165M would be super cool to have and also how to identfy I got the right address forthe VRM).
I also thought about a wire pinmod that would be driving the VRM to supply 1.55 to the opty's. I just don't know if the VID's pins on the Opty/VRM are multiplexed or latched (one time programmed after bootstrapping)
Anyway I have more than one SMBUS and there are some device that I can identify as SPD and some others I can rule out as being the VRM's.
Here's a adress/register dump:
CPUID SMBus Report
-------------------------------------------------------------------------
Binaries
-------------------------------------------------------------------------
HWMonitor version 1.1.8.0
SMB device I/O = 0xA000, address 0x50, channel = 0
SMBus registers
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
00 80 08 08 0E 0A 60 48 00 05 25 45 06 82 08 08 00
10 0C 08 60 01 01 04 03 30 45 3D 45 3C 1E 3C 2D 01
20 20 27 10 17 3C 1E 1E 00 06 3C 7F 80 18 22 0F 00
30 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 11
40 7F 98 00 00 00 00 00 00 04 4B 00 00 00 00 00 00
50 00 00 00 00 00 00 00 00 00 00 00 00 00 0B 0F 2D
60 1D C3 02 00 00 00 00 00 00 00 00 00 00 00 00 00
70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
A0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
B0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
C0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
D0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
E0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
F0 39 39 36 35 33 34 31 2D 30 30 39 2E 41 30 30 4C
SMB device I/O = 0xA000, address 0x18, channel = 0
SMBus registers
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
00 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00
10 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00
20 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00
30 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00
40 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00
50 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00
60 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00
70 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00
80 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00
90 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00
A0 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00
B0 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00
C0 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00
D0 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00
E0 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00
F0 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00 F8 08 F0 00
SMB device I/O = 0xA000, address 0x51, channel = 0
SMBus registers
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
00 80 08 08 0E 0A 60 48 00 05 25 45 06 82 08 08 00
10 0C 08 60 01 01 04 03 30 45 3D 45 3C 1E 3C 2D 01
20 20 27 10 17 3C 1E 1E 00 06 3C 7F 80 18 22 0F 00
30 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 11
40 7F 98 00 00 00 00 00 00 04 4B 00 00 00 00 00 00
50 00 00 00 00 00 00 00 00 00 00 00 00 00 08 33 81
60 CC D1 38 00 00 00 00 00 00 00 00 00 00 00 00 00
70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
A0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
B0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
C0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
D0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
E0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
F0 39 39 36 35 33 34 31 2D 30 30 39 2E 41 30 30 4C
SMB device I/O = 0xA040, address 0x51, channel = 0
SMBus registers
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
00 36 E2 79 81 E0 00 FF FF FF FF FF FF FF FF FF FF
10 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
20 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
30 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
40 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
50 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
60 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
70 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
80 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
90 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
A0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
B0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
C0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
D0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
F0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
SMB device I/O = 0xA040, address 0x19, channel = 0
SMBus registers
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00
10 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00
20 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00
30 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00
40 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00
50 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00
60 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00
70 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00
80 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00
90 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00
A0 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00
B0 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00
C0 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00
D0 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00
E0 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00
F0 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00 F0 00
SMB device I/O = 0xA000, address 0x52, channel = 0
SMBus registers
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
00 80 08 08 0E 0A 60 48 00 05 25 45 06 82 08 08 00
10 0C 08 60 01 01 04 03 30 45 3D 45 3C 1E 3C 2D 01
20 20 27 10 17 3C 1E 1E 00 06 3C 7F 80 18 22 0F 00
30 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 11
40 7F 98 00 00 00 00 00 00 04 4B 00 00 00 00 00 00
50 00 00 00 00 00 00 00 00 00 00 00 00 00 08 33 82
60 CC AF 38 00 00 00 00 00 00 00 00 00 00 00 00 00
70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
A0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
B0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
C0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
D0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
E0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
F0 39 39 36 35 33 34 31 2D 30 30 39 2E 41 30 30 4C
SMB device I/O = 0xA000, address 0x53, channel = 0
SMBus registers
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
00 80 08 08 0E 0A 60 48 00 05 25 45 06 82 08 08 00
10 0C 08 60 01 01 04 03 30 45 3D 45 3C 1E 3C 2D 01
20 20 27 10 17 3C 1E 1E 00 06 3C 7F 80 18 22 0F 00
30 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 11
40 7F 98 00 00 00 00 00 00 04 4B 00 00 00 00 00 00
50 00 00 00 00 00 00 00 00 00 00 00 00 00 08 33 82
60 CC AF 38 00 00 00 00 00 00 00 00 00 00 00 00 00
70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
A0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
B0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
C0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
D0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
E0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
F0 39 39 36 35 33 34 31 2D 30 30 39 2E 41 30 30 4C
SMB device I/O = 0xA040, address 0x2D, channel = 0
SMBus registers
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
00 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
10 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
20 77 7B CE BA 5E 63 4B 39 FF FF FF FF 00 FF 00 ED
30 B0 77 FF AF 4F DE 63 67 FB 7D 85 DF E3 6A 00 00
40 01 C8 0E 00 00 00 00 5F 2D 03 01 44 00 95 00 A3
50 FF FF 00 FF FF FF 00 80 21 70 FF FF 11 00 FF 05
60 75 7A CE BB 5C 63 4A 38 FF FF FF FF 00 FF 00 ED
70 B0 77 FF AF 4F DE 63 67 FB 7D 85 DF E3 6A 00 00
80 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
90 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
A0 75 7A CE BB 5C 63 4A 38 FF FF FF FF 00 FF 00 ED
B0 B0 77 FF AF 4F DE 63 67 FB 7D 85 DF E3 6A 00 00
C0 01 00 02 00 00 00 00 5F 2D 03 01 44 00 95 00 A3
D0 FF FF 00 FF FF FF 00 80 21 70 FF FF 11 00 FF 05
E0 75 7A CD BB 5C 62 4A 3A FF FF FF FF 00 FF 00 ED
F0 B0 77 FF AF 4F DE 63 67 FB 7D 85 DF E3 6A 00 00
SMB device I/O = 0xA040, address 0x48, channel = 0
SMBus registers
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
00 3C E0 4B E0 3C E0 4B E0 3E E0 4B E0 3D E0 4B E0
10 3E E0 4B E0 3E E0 4B E0 3D E0 4B E0 3E E0 4B E0
20 3D E0 4B E0 3D E0 4B E0 3F E0 4B E0 3C E0 4B E0
30 3E E0 4B E0 3D E0 4B E0 3D E0 4B E0 3D E0 4B E0
40 3D E0 4B E0 3C E0 4B E0 3D E0 4B E0 3D E0 4B E0
50 3E E0 4B E0 3F E0 4B E0 3D E0 4B E0 3D E0 4B E0
60 3F E0 4B E0 3C E0 4B E0 3E E0 4B E0 3E E0 4B E0
70 3F E0 4B E0 3D E0 4B E0 3E E0 4B E0 3E E0 4B E0
80 3D E0 4B E0 3D E0 4B E0 3E E0 4B E0 3E E0 4B E0
90 3E E0 4B E0 3F E0 4B E0 3E E0 4B E0 3C E0 4B E0
A0 3C E0 4B E0 3D E0 4B E0 3D E0 4B E0 3F E0 4B E0
B0 3F E0 4B E0 3D E0 4B E0 3C E0 4B E0 3D E0 4B E0
C0 3D E0 4B E0 3F E0 4B E0 3E E0 4B E0 3D E0 4B E0
D0 3D E0 4B E0 3D E0 4B E0 3E E0 4B E0 3D E0 4B E0
E0 3D E0 4B E0 3D E0 4B E0 3D E0 4B E0 3F E0 4B E0
F0 3F E0 4B E0 3F E0 4B E0 3C E0 4B E0 3F E0 4B E0
SMB device I/O = 0xA040, address 0x49, channel = 0
SMBus registers
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
00 3B E0 4B E0 3B E0 4B E0 39 E0 4B E0 3A E0 4B E0
10 3A E0 4B E0 3A E0 4B E0 3A E0 4B E0 3A E0 4B E0
20 3A E0 4B E0 3A E0 4B E0 3A E0 4B E0 39 E0 4B E0
30 39 E0 4B E0 39 E0 4B E0 38 E0 4B E0 3A E0 4B E0
40 3A E0 4B E0 3A E0 4B E0 3A E0 4B E0 39 E0 4B E0
50 3B E0 4B E0 3A E0 4B E0 3A E0 4B E0 39 E0 4B E0
60 3A E0 4B E0 3A E0 4B E0 3A E0 4B E0 3B E0 4B E0
70 3A E0 4B E0 39 E0 4B E0 39 E0 4B E0 38 E0 4B E0
80 39 E0 4B E0 39 E0 4B E0 39 E0 4B E0 3B E0 4B E0
90 3A E0 4B E0 39 E0 4B E0 38 E0 4B E0 38 E0 4B E0
A0 3A E0 4B E0 39 E0 4B E0 3A E0 4B E0 3A E0 4B E0
B0 39 E0 4B E0 3A E0 4B E0 38 E0 4B E0 38 E0 4B E0
C0 39 E0 4B E0 38 E0 4B E0 3A E0 4B E0 3A E0 4B E0
D0 3A E0 4B E0 3A E0 4B E0 39 E0 4B E0 39 E0 4B E0
E0 39 E0 4B E0 39 E0 4B E0 3B E0 4B E0 39 E0 4B E0
F0 39 E0 4B E0 3A E0 4B E0 39 E0 4B E0 39 E0 4B E0
SMB device I/O = 0xA000, address 0x78, channel = 0
SMBus registers
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
00 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
10 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
20 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
40 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
50 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
60 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
70 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
80 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
90 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
A0 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
B0 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
C0 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
D0 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
E0 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
F0 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
SMB device I/O = 0xA000, address 0x79, channel = 0
SMBus registers
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
00 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
10 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
20 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
40 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
50 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
60 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
70 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
80 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
90 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
A0 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
B0 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
C0 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
D0 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
E0 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
F0 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
SMB device I/O = 0xA000, address 0x7A, channel = 0
SMBus registers
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
00 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
10 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
20 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
40 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
50 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
60 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
70 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
80 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
90 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
A0 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
B0 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
C0 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
D0 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
E0 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
F0 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
SMB device I/O = 0xA000, address 0x7B, channel = 0
SMBus registers
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
00 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
10 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
20 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
40 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
50 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
60 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
70 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
80 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
90 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
A0 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
B0 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
C0 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
D0 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
E0 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
F0 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
Edited: 02/08/2012
at 05:34 AM
by ZippA