Hello,

we are considering to buy a system with an AMD Opteron 2384 processor. We want to conduct some experiments with dynamic voltage frequency scaling (DVFS).

It seems the chips supports DVFS per core, so one core can be running at frequency X and the other core can do it at frequency Y. However, we are not sure how to access all the actuators to change frequency/voltage.

Is cpufreq from Linux kernel supporting this? I could only find support for K8 microarchitectures and a patch to read the temperatures for K10 microarchitecture (e.g., Opteron 2384). However, we are not sure whether is it possible to perform DVFS for K10 microarchitecture using cpufreq.

Does anyone know anything about this? Any plans to support K10 in cpufreq?

Thanks in advance,
Victor

If I remember correctly, no Opteron has the ability to dynamically alter its core voltage independently of other cores. There are two voltages in the chip, one for all of the cores, L1, and L2 cache, and then another for the L3 cache and memory controller. The older 65 nm Opterons (model 2360/8360 and lower-numbered, 2 MB L3 cache) had the ability to alter the clock speed of each core independently of each other, but that feature was slightly buggy, especially under Windows, and was removed in the 45 nm Opterons like the 2384 you want to get. The speed of all cores go up and down together, just like in the older single- and dual-core Opterons.



Yes. The powernow-k8 module is the relevant kernel module, or at least it is on the single-socket equivalents (Phenom II X4) I have used.



At the very least, there is at least some K10 support in cpufreq. I have a Phenom II X4 unit I am working on that runs Debian Linux at the moment and its CPU speed and voltage scale up and down with load, governed by the powernow-k8 cpufreq driver. The silicon in the Phenom II X4 is the same as your Opteron 2384, so it should work similarly.

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Thanks for the answer!

Reading documentation from AMD (AMD Family 10h Processor BKDG) I found that there are two voltages which can be controlled: VDD and VDDNB (north-bridge, I guess). VDD is the voltage supplied to the cores. In that document they define VDD as either VDD or VDD[1:0] which makes me believe there could be several VDDs (and thus, cores with different voltage).

Could it be like that?

Thank you,
Victor

Maybe, although it looks like you're looking at the voltages that a motherboard would be supplying the CPU. I don't think the northbridge voltage changes while the CPU is running, for example. I would expect to see terms like "FID" and "VID" for frequency ID and voltage ID if that paper were discussing CPU frequency/voltage scaling.

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Thank you for your answer!

I would like to ask you if you own an Opteron Shanghai. If that is the case would you mind to execute the command 'cpufreq-info' which can list the existing dependencies between cores for changing the frequency? I would be very glad if you can provide me the output from that command.

For example, if the frequency for all the cores in a chip must be changed at the same time, the output from the command would say something like:

affected cpus: 0, 1, 2, 3

Finally, when you told me that per-core DVFS in Shanghai is not possible, could you tell me how certain is that information? Did you try it? Are you working at AMD or have any internal source?

Thank you very much!
Victor

I wish I did Sorry, my most modern CPU is a four-year-old Athlon 64 X2 4200+.



I am not 100% sure about my statements since I cannot find the processor documentation guides and I do not have the hardware in front of me. The voltages should not scale per-core as there are two voltage planes- one for the memory controller/L3 cache and another for all of the cores. The older Barcelona Opterons did have per-core frequency scaling and so did the desktop Phenoms. I know that the new desktop Phenom IIs changed the frequency scaling method and as best as I can tell, they went to a all-cores-are-the-same-speed setup as the per-core frequency scaling had performance problems on Windows. The desktop and server variants *tend* to do things similarly, which is why I said I do not think that the units have per-core frequency scaling any more. But I don't have hardware sitting in front of me, so it is just an educated guess.

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I know this is an old thread, but for posterity and for people who read this thread in the future:

I can confirm by using a power meter that the power consumption does change when you vary the frequency of a single core on the 2384. However, as stated, the voltage will only drop when all cores are at the same state, and hence the power you save will be limited unless this is the case (due to P ~= fV^2).

I also did some testing with memory throughput when varying frequency, and I can confirm that the frequency of each core is changing because the memory throughput per core drops dramatically when performing uncached reads and dropping the frequency.

I also put the machine on a scope to measure the memory frequency, and it sits at around 333MHz for all CPU frequencies (2.7, 2.0, 1.5 and 0.8GHz). The reason I did this, is because on some older opterons, the memory frequency changed when you dropped the CPU frequency.