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Topic Title: About PMU of Operon (codename"shanghai" model 2378 )
Topic Summary: the event address register
Created On: 05/27/2010 02:02 AM
Status: Read Only
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 05/27/2010 02:02 AM
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Posts: 4
Joined: 05/25/2010

Hello, everyone:
Someone ever use the SDAR in IBM POWER5 processor to get miss address online. And he also said that other processors, such as Intel Itanium 2,AMD Opteron, and IBM POWER4, can perform data address sampling, but they can not do sampling continuously in order to capture a trace.
Now I have a server with AMD Opteron processor. I want to know about the data address sampling about the Opteron, however, I cann't find the feature in the AMD64 architecture system programming manual volume 2.
Actually, I want to get the L3 miss address online in AMD Opteron. And I have known that there are some event address registers in Intel Itanium 2, and some one ever got the L2 miss address on the Platform of Itanium 2. It is a pity that I have not such experiment platform of Itanium 2. And I only have the AMD Opteron experiment platform.
So I hope someone can help me?whether there are some registers in Opteron about data address sampling.

Best regards!
Thanks a lot!
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