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Topic Title: more and more tech of Turion64
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Created On: 05/31/2005 11:47 PM
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 05/31/2005 11:47 PM
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3C3
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I wanna know more tech of T64

"Lancaster" core based on "Venice” core,but what is the different between them? only the lower voltage&wattage?? /huh.gif' border='0' style='vertical-align:middle' alt='huh.gif' />

Does anyone have the coremap??? or logic map /wub.gif' border='0' style='vertical-align:middle' alt='wub.gif' />
 06/03/2005 08:27 AM
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Greyhound
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QUOTE"Lancaster" core based on "Venice” core
Not 'Venice', but 'San Diego' - 'Lancaster' is a 1MB L2-cache part (half of this 1MB of physical L2-cache may be disabled on certain models, leaving 512KB of functional L2-cache).
QUOTEbut what is the different between them? only the lower voltage&wattage??
The Turion 64 'Lancaster'-core is pretty much identical to its Desktop-cousin 'San Diego' (both are revision SH8-E4 parts), except for the following things:

- Like all current K8-class Mobile parts, the Turion 64-line (and thus the 'Lancaster'-core) comes in a 754-pin lidless package which also means it has only a 64-bit memory-controller instead of the 939-pin part's 128-bit memory-controller

- As an additional, advanced Power-management option, the 'Lancaster'-core features a C3 Deeper Sleep state, similar to what is used on intels' Pentium M-line of mobile processors (what is used in their 'Centrino Technology package'.
Of course, it still supports PowerNOW!, which is a lot more flexible than the Pentium M's 'Speed Step' (dynamical adjustment between a variety of P-states vs. only a Max and Min P-state).

- Lastly, and most importantly, 'Lancaster' is optimized for very low core-voltages and power-consumption - 35W Max TDP for the Turion ML-series or 25W Max TDP for the Turion MT-series. (That does not imply any real changes of the core's design in comparison with its 'San Diego'-cousin, tho)

QUOTEDoes anyone have the coremap??? or logic map
I'm not really sure what you're referring to by 'core map', but if you're looking for a die-plot, you can get a basic K8 die-plot here' ">http://www.amd.com/us-en/Corpo...3%5E9479~73917,00.html.

The 'Lancaster'-core isn't really very different from its older 130nm Desktop-cousins - just a smaller manufacturing process (90nm SOI) and a bunch of optimizations and tweaks to the design here and there....you wouldn't really see them on a normal (i.e. publicly available) die-plot.

If you want a really detailed die plot or even detailed electrical schematics, I do not believe those are publicly available (and you probably wouldn't get them on request either, even if you were a developer)....that'd be like asking Coca Cola to give you their full and detailed recipe including all their secret ingredients...

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 06/03/2005 10:12 AM
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3C3
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Thank you very much ,Greyhound!!!!
 06/03/2005 10:20 AM
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3C3
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one more question:

What about the next gen of Turion64,it will still based on the desk core,or it will be designed as an independent core,like dothan from Prescott(pentium m platform from pentium 4 platform)

 06/07/2005 12:15 AM
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3C3
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anyone know??
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